Real-time monitoring of particles in semiconductor vacuum environment

ABSTRACT

An apparatus includes semiconductor processing equipment. A particle detecting integrated circuit is positioned in a vacuum environment, the particle detecting integrated circuit containing a device having a pair of conductive lines exposed to the vacuum environment. The pair of conductive lines is spaced at a critical pitch corresponding to diameters of particles of interest. A computer system is linked to the particle detecting integrated circuit to detect a change in an electrical property of the conductive lines when a particle becomes lodged between or on the lines.

TECHNICAL FIELD

This invention relates to real-time monitoring of particles in a semiconductor vacuum environment.

BACKGROUND

A microprocessor is an integrated circuit (IC) built on a tiny piece of silicon. A microprocessor contains millions of transistors interconnected through fine wires made of aluminum or copper.

Microprocessor fabrication is a complex process involving many steps. Microprocessors are typically built by layering materials on top of thin rounds of silicon, called wafers, through various processes using chemicals, gases and light. In chip making, very thin layers of material, in carefully designed patterns, are put on the blank silicon wafers. The patterns are computerized designs that are miniaturized so that up to several hundred microprocessors can be put on a single wafer.

Because the patterns are so small, it is nearly impossible to deposit material exactly where it needs to be on the wafer. Instead, a layer of material is deposited or grown across an entire wafer surface. Then, the material that is not needed is removed and only the desired pattern remains.

The microprocessor fabrication process begins with “growing” an insulting layer of silicon dioxide on top of a polished wafer in a high temperature furnace. Photolithography, a process in which circuit patterns are printed on the wafer surface, is next. A temporary layer of a light sensitive material called a “photoresist” is applied to the wafer. Ultraviolet light shines through clear spaces of a stencil called a “photomask” or “mask” to expose selected areas of the photoresist. Masks are generated during a design phase and are used to define a circuit pattern on each layer of a chip. Exposure to light chemically changes the uncovered portions of the photoresist. The machine used to do this is typically called a “scanner” because it scans one die or a few die at a time, then steps to the next die or set of die until it has exposed the entire wafer.

An active area of the mask is exposed to a vacuum environment of a scanner and is at high risk of accumulating particles. If a particle lands in a critical part of the active area then it will lead to a printed defect on the wafer. This defect causes decreased yields, or increased wafer cost in rework if the defect is fortuitously caught prior to further wafer processing by wafer defect metrology.

DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram of an exemplary optical projection lithography system.

FIG. 2 is a block diagram of a stage.

FIG. 3 is a block diagram of an exposed semiconductor component.

FIG. 4 is a flow diagram of a real-time particle monitoring process.

Like reference symbols in the various drawings indicate like elements.

DETAILED DESCRIPTION

The systems and techniques described here relate to real-time monitoring of particles in vacuum environments of semiconductor processing equipment. For ease of discussion, a photolithography process of a semiconductor fabrication is used as an example for describing the real-time monitoring of particles in vacuum chambers of semiconductor processing equipment. However, the systems and techniques described herein are not limited to photolithography; rather, they can be used in any semiconductor vacuum process environment in which a real-time monitoring of particles is needed, such as while depositing a film on a semiconductor wafer or implanting a dopant on a semiconductor wafer.

A semiconductor manufacturing process hinges on a use of a photographic process to generate fine featured patterns of an integrated circuit (IC). Each layer of a chip is defined by a specific mask. A mask is somewhat like a photographic negative, which is made by patterning a film of chromium on a pure quartz glass plate. The finished plates are referred to as reticles. Reticles are manufactured by sophisticated and expensive pattern generation equipment, which is driven from a chip design database. The patterns are formed on the chromium plated quartz by removing the chromium with either laser or electron-beam driven tools.

Referring to FIG. 1, an exemplary optical projection lithography system 10, such as an extreme-ultraviolet (EUV) lithography system, is shown. Optical projection lithography is the technology used to print the intricate patterns that define integrated circuits onto a semiconductor wafer 12. The system 10 includes an illuminator enclosure 14, a mask-stage chamber 16, a camera chamber 18 and a wafer-stage chamber 20.

The illuminator enclosure 14 includes laser optics that, for example, generate EUV light from a plasma generated when a laser illuminates a jet of xenon gas. The light is collected and focused on a mask 22 residing on a mask stage 24 in the mask-stage chamber 16 by a series of condenser mirrors 26 a, 26 b, 26 c, 26 d. A mask image is projected onto the wafer 12 by a reduction camera 28 a, 28 b, 28 c, 28 d, while the mask 22 and wafer 12 are simultaneously scanned. The entire operation takes place in high-vacuum environmental chambers and is controlled by a computer system 29.

Impurities 32, such as metallic and/or non-metallic particles, can be present in the mask-stage chamber 16. If one of the particles 32 lands on a critical part of an active area of the mask 22 it will lead to a printed defect on the wafer 12. This defect causes decreased yields, or increased wafer cost in rework if the defect is detected at an early stage. The present invention provides a real-time detection of the presence of particles in the vicinity of the mask 22 that would warrant stoppage of the lithography system 10. In an extreme-ultraviolet (EUV) lithography environment, particle sizes that are estimated to be of concern are on the order of 50 nanometers (nm).

As shown in FIG. 2, the mask stage 24 includes a placement of one or more active semiconductor components 30 near the mask 22 and embedded within the mask stage 24. The active semiconductor components 30 can include any number of different devices that function to detect particles that land on them.

As shown in FIG. 3, each active semiconductor component 30 includes one or more devices 31. Each device 31 includes a pair of conductive lines 34, 36 exposed to a local vacuum environment within the mask-stage chamber 16. The conductive lines 34, 36 of the device 31 are spaced at a critical pitch corresponding to the smallest particle diameter of interest. A voltage is applied to the conductive lines 34, 36 of the device 31. A metallic particle having a diameter the size of the pitch between the conductive lines 34, 36, or larger, generates a short in a current flow between the conductive lines 34, 36. A non-metallic particle having a diameter the size of the pitch between the conductive lines 34, 36, or larger, generates a change in capacitance between the conductive lines 34, 36. The short and/or change in capacitance is detected by the computer system 29. Detection of such particle(s) provides a warning that particles are in the vicinity of a critical part of the tool, such as near the mask 22 in this lithography example. When detected, corrective action can be taken, such as terminating the lithography process before the particles cause imperfections in the wafer 12. In one particular embodiment, the short and/or change in capacitance is detected by off-chip circuitry (not shown).

A number of these devices 31 can be located in the semiconductor device 30 providing determination of particle density counts. Devices 31 sensitive to various particle sizes, e.g., by varying the pitch of the pairs of lines, can also be incorporated into the active semiconductor component 30 to monitor a range of particle sizes through a region or regions of interest.

In a particular embodiment, each active semiconductor component 30 is protected by a remote-controlled removable cover (not shown) until the component 30 is ready to be exposed to a vacuum environment. The cover is remotely triggered by the computer system 29 or other triggering mechanism (not shown) to open when desired, exposing the device 31 to the vacuum environment.

As shown in FIG. 4, a real-time monitoring process 100 for detecting particles in a semiconductor vacuum environment includes exposing (102) a particle detecting integrated circuit embedded in a stage to residual gases and particles within a vacuum environment. The particle detecting integrated circuit includes a device having a pair of conductive lines spaced at a critical pitch corresponding to diameters of particles of interest.

Process 100 applies (104) a voltage to the pair of conductive lines and detects (106) a change in an electrical property of the conductive lines resulting from a particle landing on or between the pair of conductive lines. A metallic particle having a diameter the size of the pitch between the lines, or larger, generates a short in a current flow between the lines. A non-metallic particle having a diameter the size of the pitch between the lines, or larger, generates a change in capacitance between the lines. The short and/or change in capacitance is detected by the computer system. Once detected, corrective action can be initiated.

Other embodiments are within the scope of the following claims. 

1. An apparatus comprising: a vacuum chamber containing a particle detecting integrated circuit, the particle detecting integrated circuit including a device having a pair of exposed conductive lines spaced at a critical pitch corresponding to particles of interest.
 2. The apparatus of claim 1 further comprising a computer system linked to the particle detecting integrated circuit.
 3. The apparatus of claim 1 wherein the particle detecting integrated circuit includes a remote-controlled movable cover protecting the device.
 4. The apparatus of claim 1 wherein the particle detecting integrated circuit includes a plurality of devices.
 5. The apparatus of claim 4 wherein the plurality of devices include a uniform pitch representing a single particle size between pairs.
 6. The apparatus of claim 4 wherein the plurality of devices include a plurality of pitches representing a range of particle sizes between pairs.
 7. The apparatus of claim 2 wherein the computer system detects a change in current when a metallic particle shorts the pair of exposed conductive lines.
 8. The apparatus of claim 2 wherein the computer system detects a change in capacitance when a non-metallic particles lodges on or between the pair of exposed conductive lines.
 9. An apparatus comprising: a mask stage in a vacuum chamber of semiconductor processing equipment; a particle detecting integrated circuit embedded in the mask stage, the particle detecting integrated circuit containing a device having a pair of conductive lines exposed to a local vacuum environment, the pair of lines spaced at a critical pitch corresponding to particles of interest.
 10. The apparatus of claim 9 further comprising a computer system linked to the particle detecting integrated circuit.
 11. The apparatus of claim 10 wherein the pair of conductive lines have an applied voltage.
 12. The apparatus of claim 11 wherein the computer system detects a change in current when a metallic particle shorts the pair of conductive lines.
 13. The apparatus of claim 11 wherein the computer system detects a change in capacitance when a non-metallic particle lodges on or between the pair of conductive lines of the particle detecting integrated circuit.
 14. The apparatus of claim 1Q wherein the computer system is semiconductor component circuitry.
 15. The apparatus of claim 1Q wherein the computer system is off-chip circuitry.
 16. The apparatus of claim 9 wherein the particle detecting integrated circuit comprises a plurality of devices.
 17. The apparatus of claim 16 wherein each of the plurality of devices includes pairs of conductive lines having a uniform pitch representing a single particle size.
 18. The apparatus of claim 16 wherein each of the plurality of devices includes pairs of conductive lines having a non-uniform pitch representing a range of particle sizes.
 19. A method comprising: exposing a particle detecting integrated circuit to residual gases and particles within a vacuum environment, the particle detecting integrated circuit containing a device having a pair of conductive lines spaced at a critical pitch corresponding to particles of interest; applying a voltage to the pair of conductive lines; and detecting a change in an electrical property of the conductive lines resulting from a particle landing on or between the pair of conductive lines.
 20. The method of claim 19 wherein detecting comprises a change in current between the pair of conductive lines.
 21. The method of claim 19 wherein detecting comprises a change in a capacitance between the pair of conductive lines.
 22. The method of claim 19 further comprising exposing a plurality of devices to the residual gases and particles within the vacuum environment, each one of the devices having a pair of conductive lines spaced at a critical pitch corresponding to particles of interest.
 23. The method of claim 22 wherein the critical pitch corresponds to a range of particles of interest.
 24. A chip fabrication method comprising: a photolithography process including a real-time particle detection process, the real-time particle detection process comprising: exposing a particle detecting integrated circuit embedded in a stage to residual gases and particles within a vacuum environment, the particle detecting integrated circuit containing a device having a pair of conductive lines spaced at a critical pitch corresponding to particles of interest; applying a voltage to the pair of conductive lines; detecting a change in an electrical property of the conductive lines resulting from a particle landing on or between the pair of conductive lines; an etching process; a stripping process; a diffusion process; an ion implantation process; a deposition process; and a chemical mechanical planarization process.
 25. The method of claim 24 wherein detecting a change comprises a change in current between the pair of conductive lines.
 26. The method of claim 24 wherein detecting a change comprises a change in a capacitance between the pair of conductive lines.
 27. The method of claim 24 wherein exposing further comprises exposing a plurality of devices to the residual gases and particles within the vacuum environment, each of the devices containing a pair of conductive lines spaced at a critical pitch corresponding to particles of interest.
 28. The method of claim 27 further comprising: applying a voltage to the conductive lines of the plurality of devices; and detecting changes in electrical properties of the pairs of conductive lines resulting from particles landing on or between the pairs of conductive lines.
 29. The method of claim 28 wherein critical pitches of the conductive lines of the devices correspond to a range of particles of interest. 